Top 6 Apps Similar to VDAT 2015
VerilogCourseTeam 1.1
Verilog Course Team offers servicesandsolutions in VLSI,Matlab and Embedded.Download this app toaccessIEEE paper offline.Download IEEE papers in VLSI and Matlab.First timedownloadoccupies approximately 20MB of space.Access all latest IEEEpapersoffline.We develop IEEE paper concept using VerilogHDL/Matlab andcustomize as per requirement.You can see some of our project demo in YouTube,http://www.youtube.com/verilogcourseteamWe keep updating our repositories so please do checkthe"Notification"tab in the app.
Basics of VLSI Design 7
The app is a complete free handbook of VLSI with diagramsandgraphs.It is part of electronics & communicationsengineeringeducationwhich brings important topics, notes, news& blog onthe subject.Download the App as quick reference guide& ebookon thiselectronics & communications engineeringsubject. Theapp coversmore than 90 topics of VLSI Design indetail. Thesetopics aredivided in 5 units. You can very easilypass and succeedin yourexams or interviews, the app provides quickrevision andreference tothe topics like a detailed flash card.Each topic iscomplete withdiagrams, equations and other forms ofgraphicalrepresentations foreasy understanding. Some of topicsCovered inthis application are:1. Semiconductor memories:Introduction andtypes 2. Read Only Memory(ROM) 3. Threetransistor DRAM cell 4.One transistor DRAM Cell 5.Flash memory 6.Low - Power CMOS LogicCircuits: Introduction 7.Design of CMOSinverters 8. MOS Inverters: introduction toswitchingcharacteristics 9. Scan-BasedTechniques 10. Built-In SelfTest(BIST) Techniques 11. Historicalprospective of VLSI Design:Moore's Law 12. Classification of CMOSdigital circuit types 13.ACircuit Design Example 14. VLSI Designmethodologies 15. VLSIDesignflow 16. Design Hierarchy 17. Conceptof regularity,modularity andlocality 18. CMOS fabrication 19.Fabrication ProcessFlow : BasicSteps 20. Fabrication of the nMOStransistor 21. CMOSfabrication :p-well process 22. CMOSfabrication : n-well process23. CMOSfabrication : twin tubprocess 24. Stick diagrams and masklayoutdesign 25. MOStransistor : physical structure 26. The MOSSystemunder ExternalBias 27. Structure and operation of MOSFET 28.Thethresholdvoltage 29. Current voltage characteristics of MOSFET30.Mosfetscaling 31. Effects of scaling 32. Small Geometry Effects33.MOSCapacitances 34. MOS inverter 35. Voltagetransfercharacteristics(VTC) of MOS inverter 36. Inverters withn-typeMOSFET load 37.Resistive load inverter 38. Design ofDepletion-LoadInverters 39.CMOS inverter 40. Delay time definitions41.Calculation of DelayTimes 42. Inverter Design with DelayConstrains: Example 43.Combinational MOS Logic Circuits :introduction 44.MOS LogicCircuits with Depletion nMOS Loads :Two-Input NOR Gate45. MOSLogic Circuits with Depletion nMOS Loads :GeneralizedNORstructure with multiple inputs 46. MOS LogicCircuitswithDepletion nMOS Loads : Transient analysis of NOR gate47. MOSLogicCircuits with Depletion nMOS Loads : Two-Input NANDGate 48.MOSLogic Circuits with Depletion nMOS Loads :GeneralizedNANDstructure with multiple inputs 49. MOS LogicCircuitswithDepletion nMOS Loads : Transient analysis of NAND gate50.CMOSlogic circuits : NOR2 (two input NOR ) gate 51. CMOSNAND2(twoinput NAND) gate 52. Layout of Simple CMOS Logic Gates53.ComplexLogic Circuits 54. Complex CMOS Logic Gates 55. LayoutofComplexCMOS Logic Gates 56. AOI and OAI Gates 57. Pseudo-nMOSGates58.CMOS Full-Adder Circuit & carry ripple adder59.CMOSTransmission Gates (Pass Gates) 60.ComplementaryPass-TransistorLogic (CPL) 61. Sequential MOS logicCircuits :Introduction 62.Behavior of Bistable Elements 63. The SRLatchCircuit 64. ClockedSR Latch 65. Clocked JK Latch 66.Master-SlaveFlip-Flop 67. CMOSD-Latch and Edge-Triggered Flip-Flop68. DynamicLogic Circuits :Introduction 69. Basic Principles ofPassTransistor Circuits Alltopics are not listed because ofcharacterlimitations set by thePlay Store.
